Liquid crystal display device and its manufacturing method

ABSTRACT

In an active matrix type liquid crystal display device comprising a TFT having gate lines and data lines formed in a matrix manner and being connected to a source line, a contact hole for connecting the source line with a pixel electrode is formed in a position overlapping a disclination line. The contact hole is formed in a position overlapping a capacitance portion of the gate line. The gate line and the source line are provided to oppose to each other, and electrostatic capacitance is stored therebetween.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a liquid crystal display deviceand its manufacturing method, and particularly relates to an activematrix type liquid crystal display device having a color filter on itselement substrate and its manufacturing method.

[0003] 2. Description of the Related Art

[0004] The active matrix liquid crystal display device comprises anelement substrate with a switching element such as a transistor, etc.,an opposite substrate arranged to be opposite to the element substrate,and a liquid crystal filled between the element substrate and oppositesubstrate.

[0005] The opposite substrate has a color filter (CF) and a blackmatrix. The color filer consists of color layers of red, green or bluearranged regularly. The black matrix is formed of a film with a lightshielding property (opaque). The black matrix shields disclination ofthe liquid crystal to prevent a reduction in contrast.

[0006] The liquid crystal is filled in a space between the elementsubstrate and opposite substrate. Alignment layers are formed on theopposite surfaces of the element substrate and opposite substraterespectively. The alignment layers are formed in such a manner that aresin film such as polyimide is formed on substrates and the resultantsurfaces are subjected to alignment treatment such as rubbing. Thealignment layers provide a predetermined alignment (orientation) toliquid crystal molecules in the liquid crystal.

[0007] Here, the disclination refers to an alignment defect in whichdiscontinuity occurs in the alignment direction of liquid crystalmolecules due to a level difference in the alignment surface of liquidcrystal, distribution of an electric filed and an abrupt change in adriving voltage. Such liquid crystal alignment defect appears as a lineor dot detect, resulting in deterioration of display quality. Thedisclination occurs in a display area overlapping with irregularportions on the surfaces of substrates, ununiform portions of the liquidcrystal alignment caused by variations in the degree of rubbing, and thelike.

[0008] In the above structure in which the color filter and black matrixare provided on the opposite substrate, it is necessary to preform theblack matrix with a width larger than that of an ideal masking area ondesign. The reason lies in ensuring a margin for error in the alignmentof element substrate and opposite substrate. However, if the width ofthe black matrix is too wide, there occurs difficulty in setting anaperture ratio of liquid crystal display element largely, therebydecreasing brightness Here, the aperture ratio means the percentage of apixel area contributing to optical modulation to the entire surface areaof the display area of a liquid crystal display panel.

[0009] In order to improve the aperture ratio of liquid crystal displayelement, there is disclosed the structure for forming a color filter andblack matrix on an element substrate. This is referred to as CF (ColorFilter)-On TFT structure, and the structure is described, for example,in Japanese Patent No. 2758410 and Unexamined Japanese PatentApplication KOKAI Publication No. H3-237432.

[0010] In the CF-On TFT structure, the color filter and black matrix areformed on the element substrate. Accordingly, it is unnecessary toensure a margin for alignment of the element substrate and oppositesubstrate. This makes it possible to simplify the manufacturing processand to achieve a high aperture ratio.

[0011] At the occasion of pushing forward high definition, the use ofCF-On TFT structure makes it difficult to realize the high apertureratio for the following reason.

[0012] More specifically, in the CF-On TFT structure, the size ofcontact hole for connecting a pixel electrode and a source electrode isrelatively large, and an exclusive area for a contact hole accounts fora relatively high percentage in each pixel area. This is because thetaper of the side surface of contact hole must be gently formed toprevent occurrence of level separation of the pixel electrode formed onthe inner surface of contact hole. In order to make the taper gentle, aplurality of layers (passivation layer, color layer, overcoat layer,etc.), which separate the pixel electrode and source electrode, ispatterned to form apertures respectively. In this case of forming acontact hole for each layer, it is necessary to ensure a margin foralignment for each patterning process. Resultantly, the size of contacthole is relatively large. The area for contact hole is generallyshielded from light. Accordingly, the percentage of the area for thecontact hole in the pixel area increases with the progress of highdefinition, resulting that the aperture ratio relatively decreases.

[0013] Moreover, the percentage of the area for the black mask formasking (shielding) the disclination occurring region relativelyincreases with the progress of high definition, though this is notlimited to the CF-On TFT structure. Accordingly, the aperture ratiorelatively decreases.

[0014] Thus, in the active matrix liquid crystal display device, eventhough the CF-On TFT structure is used, the percentage of masking arearelatively increases, resulting in decreasing in the aperture ratio, ifthe high definition progresses and a pixel pitch becomes narrow. On theother hand, if the percentage of masking area is small in order toachieve high aperture ratio, disclination becomes conspicuous.

SUMMARY OF THE INVENTION

[0015] In order to obtain the above problem, it is an object of thepresent invention is to provide a liquid crystal display device that iscapable of implementing a high aperture ratio and its manufacturingmethod.

[0016] Additionally, it is another object of the present invention is toprovide a liquid crystal display device that is capable of maskingdisclination and its manufacturing method.

[0017] In order to achieve the objects according to one aspect of thepresent invention, there is provided a liquid crystal display devicecomprising:

[0018] a pair of substrates;

[0019] a liquid crystal sealed between said pair of substrates;

[0020] a plurality of data lines and a plurality of scanning lines,being arranged on one surface of one of said pair of substrates andcrossing each other,

[0021] a switching element having one end of a current path connected tothe corresponding data line and a control end connected to thecorresponding scanning line;

[0022] a wiring connected to the other end of the current path of saidswitching element;

[0023] an insulating layer, being formed on said wiring and having acontact hole through which an end portion of said wiring is exposed;

[0024] a pixel electrode, being formed on said insulating later andelectrically connected to the end portion of said wiring through thecontact hole; and

[0025] an alignment film, being formed on said pixel electrode and incontact with said liquid crystal,

[0026] wherein said contact hole is formed at a position overlapping aregion where disclination occurs.

[0027] The liquid crystal display device according to the one aspect ofthe present invention, wherein said insulating layer may be formed of aplurality of laminated insulating films,

[0028] the insulating films may have openings individually which formsaid contact hole in a tapered shape as a whole.

[0029] The liquid crystal display device according to the one aspect ofthe present invention, wherein said insulting films may include apassivation film formed on the switching element, a color layer formedon said passivation film, and a flattening film formed on saidpassivation film and color layer,

[0030] said contact hole may include openings formed in the passivationfilm, the color layer, and the flattening film, respectively, and theopenings being formed in a tapered shape as a whole.

[0031] The liquid crystal display device according to the one aspect ofthe present invention, wherein said wiring may be made of a lightshielding material, and

[0032] said contact hole and at least a part of said region wheredisclination occurs may be shielded by said wiring.

[0033] The liquid crystal display device according to the one aspect ofthe present invention, wherein the scanning lines and the data linesbounds a plurality of pixels each having said contact hole,

[0034] said contact hole in the pixel may be provided at a downstream ina rubbing direction with respect to the switching element of other pixeladjacent to the pixel.

[0035] The liquid crystal display device according to the one aspect ofthe present invention, wherein said scanning line may have a projectingportion overlapping said contact hole and/or said region wheredisclination occurs and shielding light.

[0036] The liquid crystal display device according to the one aspect ofthe present invention, further comprising a black matrix overlappingsaid data lines, wherein said black matrix may have a wide portionoverlapping a region in the pixel between said data line and theprojecting portion.

[0037] The liquid crystal display device according to the one aspect ofthe present invention, wherein said projecting portion may formelectrostatic capacitance between the wiring.

[0038] In order to achieve the objects according to second aspect of thepresent invention, there is provided a liquid crystal display devicemanufacturing method, the liquid crystal display device comprising athin film transistor, a wiring connected to said thin film transistor, apixel electrode electrically connected to said wiring, and an alignmentfilm formed on said pixel electrode, comprising steps of:

[0039] forming an insulating layer overlying the thin film transistorand the wiring (14);

[0040] forming a contact hole in the insulating layer through which anend portion of said wiring is exposed;

[0041] forming the pixel electrode on the insulating layer connectedelectrically with the wiring through the contact hole; and

[0042] forming the alignment film on the pixel electrode,

[0043] wherein the step of forming the contact hole comprising a step offorming the contact hole in a position overlapping a region wheredisclination occurs.

[0044] A liquid crystal display device manufacturing method according tothe second aspect of the present invention, the insulating layer mayinclude a plurality of laminated insulating films,

[0045] the step of forming the contact hole comprising, for example, astep of forming openings in the plurality of the insulating filmsrespectively.

[0046] A liquid crystal display device manufacturing method according tothe second aspect of the present invention, the insulating layerincluding, for example, a passivation film formed on the switchingelement, a color layer formed on said passivation film, and a flatteningfilm formed on said passivation film and color layer,

[0047] the step of forming the contact hole comprising, for example, astep of forming openings in the passivation film, the color layer, andthe flattening film, respectively, thereby forming the contact hole in atapered shape as a whole.

BRIEF DESCRIPTION OF THE DRAWINGS

[0048] These objects and other objects and advantages of the presentinvention will become more apparent upon reading of the followingdetailed description and the accompanying drawings in which:

[0049]FIG. 1 is a plane view of a liquid crystal display deviceaccording to the present invention;

[0050]FIG. 2 is a view illustrating a cross-sectional structure of theliquid crystal display device illustrated in FIG. 1;

[0051]FIGS. 3A to 3I are views each showing the manufacturing process ofthe liquid crystal display device shown in FIG. 1;

[0052]FIG. 4 shows a result of examining a relationship betweendefinition and contact hole area ratio;

[0053]FIG. 5 is a plane view illustrating the structure of a liquidcrystal display device according to a comparison; and

[0054]FIG. 6 is a view illustrating another embodiment of the presentinvention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0055] The liquid crystal display device of the present invention willbe explained with reference to the drawings accompanying herewith. Theliquid crystal display device of this embodiment is an active matrixliquid crystal display device having a TFT (Thin Film Transistor) as anactive element.

[0056]FIG. 1 is a plane layout of a unit pixel area 11 a on a TFTsubstrate 100 of an active matrix liquid crystal display device 11according to this embodiment. FIG. 2 shows a cross-sectional structureof the active matrix liquid crystal display device 11. Thiscross-sectional view corresponds to a cross section taken in thedirection of the arrows along line A-A′ of TFT substrate 100 shown inFIG. 1, a cross section taken in the direction of the arrows along lineB-B′ thereof, and a cross section of end portion thereof.

[0057] As illustrated in FIG. 2, the liquid crystal display device 11 ofthis embodiment comprises a TFT substrate 100, an opposite substrate200, and a liquid crystal 300.

[0058] The TFT substrate 100 and opposite substrate 200 are arranged tobe opposite to each other via a spacer (not shown). The peripheralportions of the TFT substrate 100 and opposite substrate 200 are bondedto each other by seal material 109. The liquid crystal 300 is filled ina liquid crystal cell (sealed portion) formed of the TFT substrate 100,the opposite substrate 200, and the seal material 109.

[0059] The TFT substrate 100 has a first transparent substrate 101formed of a transparent glass, transparent plastic, etc. On one surfaceof the first transparent substrate 101, a gate line 12 is formed. Thegate line 12 is made of, for example, opaque metal such as chromium,aluminum, molybdenum, etc., or a laminated film of these materials. Thegate line 12 extends in an X-direction (horizontal direction in thefigure) as illustrated in FIG. 1, and bounds the sides of X-direction ofunit pixel area 11 a. The gate line 12 has a first projecting portion 12a, which extends to a position overlapping the TFT in the unit pixelarea 11 a at the upper side in the figure, and a second projectingportion 12 b, which extends in a Y-direction in the unit pixel area 11 aat the lower side in the figure. The first projecting portion 12 aconstitutes a TFT gate electrode, as described later.

[0060] The second projecting portion 12 b has a shield portion 12 ba anda capacitance portion 12 bb. The shield portion 12 ba has asubstantially square shape, overlaps the region for a contact hole 108and shields it, as described later. It should be noted that an opening12 c for suppressing parasitic capacitance is formed at a position,which is a central portion of shield portion 12 ba and overlaps with acontact hole 18 to be described later. The capacitance portion 12 bb ofthe second projecting portion 12 b is formed in such a way as to have awidth narrower than that of the shield portion 12 ba in the X-directionand extend in the Y-direction up to substantially the center of the unitpixel area 11 a from the shield portion 12 ba. The capacitance portion12 bb forms auxiliary capacitance between the source line 14 opposingthereto, as described later.

[0061] As illustrated in FIG. 2, a gate insulating film 102 is formed onthe surface of first transparent substrate 101 and the gate line 12. Thegate insulating film 102 is formed of a silicon oxide film, siliconnitride film, etc., or a laminated film of these materials.

[0062] A semiconductor island 103 is formed on the gate insulating film102 over the first projecting portion 12 a of gate line 12. Thesemiconductor island 103 is formed of amorphous silicon, polysilicon,etc. On the surface of semiconductor island 103, a region doped withimpurity material such as phosphorus, etc. is formed. The doped regionis divided into a source region and a drain region by a groove 103 a.The semiconductor island 103 forms a TFT 15 together with the firstprojecting portion 12 a functioning as a gate electrode.

[0063] As illustrated in FIG. 2, on the gate insulating film 102, a dataline 13 and a source line 14 are formed on the gate insulating film 102.The data line 13 and source 14 are formed of, for example, metal such aschromium, aluminum, molybdenum, etc. or a laminated film of thesematerials.

[0064] The data line 13 extends in the Y-direction as illustrated inFIG. 1, and bounds the sides of Y-direction of unit pixel area 11 a. Thedata line 13 has a drain electrode portion 13 a, which extends in theX-direction up to TFT 15 in the unit pixel area 11 a. As illustrated inFIG. 2, the drain electrode portion 13 a comes in contact with one dopedregion of semiconductor island 103 of TFT 15 (drain region at the rightof FIG. 2), thereby forming the drain electrode of TFT 15.

[0065] The source line 14 is formed at substantially the center of unitpixel area 11 a extending in the Y-direction to be opposite to thesecond projecting portion 12 b of gate line 12. One end 14 a of sourceline 14 is connected to the source region of semiconductor island 103,and functions as a source electrode of TFT 15. The other end 14 b ofsource line 14 is placed at the position overlapping an opening 12 csurrounded by the second projecting portion 12 b and connected to apixel electrode 17 through the contact hole 18, to be described later.

[0066] It should be noted that the source line 14 is provided insubstantially the center of unit pixel area 11 a and separated from thegate line 12 and the data line 13, so that the probability of occurrenceof shorts is relatively low.

[0067] As illustrated in FIG. 2, on the gate insulating film 102, apassivation layer 104 is formed to cover the data line 13, source line14, semiconductor island 103, and so on. The passivation layer 104 isformed of silicon oxide, silicon nitride, etc. or a laminated film ofthese materials.

[0068] Moreover, on the passivation layer 104, a color layer 105 isformed. The color layer 105 is made of, for example, photosensitiveresin, etc., and is formed on the passivation layer 104. The color layer105 is provided one by one for each unit pixel area 11 a, and is coloredwith any of colors, red, green and blue.

[0069] On the color layer 105, a black matrix 16 is formed. The blackmatrix 16 is made of light shielding (opaque) material such as resinmaterial in which carbon particles are dispersed. As illustrated in FIG.1, the black matrix 16 overlaps the data line 13 and is formed to bewider than the data line 13, masks the data line 13 against a backlightillumination.

[0070] Moreover, the black matrix 16 has a first wide portion 16 a andsecond wide portion 16 b each projecting in the X-direction. The firstwide portion 16 a is provided to overlap the TFT 15 formed region. Thesecond wide portion 16 b is provided to partially overlap the shieldportion 12 ba of second projecting portion 12 b of gate line 12 andcover a gap between the data line 13 and the other end 14 b of sourceline 14.

[0071] An overcoat layer 106 is formed in such a way as to cover thecolor layer 105 and black matrix 16. The overcoat layer 106 is formed oftransparent resin, etc., and its surface is flattened.

[0072] On the overcoat layer 106, a pixel electrode 17 is formed. Thepixel electrode 17 is made of transparent conductive material, such asITO (Indium Tin Oxide).

[0073] The pixel electrode 17 is electrically connected to the sourceline 14 through the contact hole 18. The contact hole 18 is formedthrough the passivation layer 104, color layer 105, and overcoat layer106. As illustrated in FIG. 1, the contact hole 18 is formed at aposition overlapping the end portion 14 b of source line 14, and has,for example, a cross section of a substantially square shape.

[0074] The forming region of contact hole 18 is required to be maskedsimilar to TFT 15, data line 13, and the like. Here, the source line 14is formed of a light shielding metal and the contact hole 18 is masked(shielded) by the end portion 14 b of source line 14.

[0075] The contact hole 18, as illustrated in FIG. 2, comprises anopening 104 a of passivation layer 104, an opening 105 a of color layer105, and an opening 106 a of overcoat layer 106. The openings 105 a and106 a are formed in a gentle taper shape. Moreover, a sidewall of theopening 105 a of color layer 105 is coated with the overcoat layer 106not to come in contact with the pixel electrode 17.

[0076] On the pixel electrode 17 and overcoat layer 106, an alignmentfilm 107 is formed. The alignment film 107 is made of a polyimide resin,etc. The surface of alignment film 107 is subjected to alignment(orientation) process such as rubbing to a predetermined direction. Thealignment film 107 aligns liquid crystal molecules in a predetermineddirection.

[0077] Moreover, a polarization plate 108 is adhered onto the othersurface of TFT substrate 100.

[0078] On the other hand, the opposite substrate 200 comprises a secondtransparent substrate 201, opposite electrode 202, and alignment film203.

[0079] The second transparent substrate 201 is made of transparentglass, plastic, etc.

[0080] The opposite electrode 202 is formed of transparent conductivematerial such as ITO, and is placed on one surface of the secondtransparent substrate 201 to be opposite to pixel electrodes 17 on TFFsubstrate 100. The alignment film 203 is formed on the oppositeelectrode 202, and its surface is subjected to alignment process such asrubbing etc.

[0081] In order to drive the liquid crystal display device 11, a drivercircuit (not shown) applies a gate pulse to the gate line 12sequentially, and applies a data signal of voltage, corresponding todisplay gradation, to the data line 13 to be substantially synchronouswith the gate pulse. TFT 15 connected to the gate line 12 to which thegate pulse is applied (selected) is activated. At this point, thevoltage applied to the data line 13 is applied to the pixel electrode 17via the drain electrode 13 a, semiconductor island 103, source electrode14 a, source line 14, end portion 14 b, and contact hole 18.

[0082] When the gate pulse is turned off, TFT 15 is inactivated. At thispoint, the voltage applied to the pixel electrode 17 is held incapacitance (pixel capacitance) between the pixel electrode 17 and theopposite electrode 202, and the auxiliary capacitance between the sourceline 14 and the capacitance portion 12 b of gate line 12.

[0083] Resultantly, a voltage corresponding to the display gradation isapplied to the liquid crystal 300 of each unit pixel area 11 a before anext selected time, the liquid crystal 300 is aligned in a desiredorientation, and the color of color layer 105 with a desired gradationis displayed.

[0084] In the above-structured liquid crystal display device 11, on thesurface of alignment film 107, there exists a region subjected to unevenalignment treatment by rubbing. In such region, the so-calleddisclination occurs when the display operation is performed.

[0085] For example, as illustrated in FIG. 1, it is assumed that therubbing direction is a direction indicated by an arrow (direction fromthe upper right portion in FIG. 1 to the lower left portion). In thiscase, in the TFT forming region of other unit pixel area 11 a adjacentto the unit pixel area 11a shown in FIG. 1, since the surface projectsas compared with other portions, the degree of rubbing is poor at thedownstream side of rubbing (unit pixel area 11 a, upper left region inFIG. 1) and alignment restriction power onto liquid crystal molecules issmaller than that of the other regions.

[0086] The boundary between domains having thus different alignmentrestriction power appears as, for example, a disclination line 19 formedfrom the upper right portion of unit pixel area 11 a in FIG. 1 to thelower left portion at the time of display operation.

[0087] In this embodiment, as illustrated in FIG. 1, the contact hole 18is formed at the position overlapping the region where disclinationoccurs (region where disclination line 19 appears). Therefor, thecontact hole 18 is arranged at a downstream in a rubbing direction withrespect to the TFT in other unit pixel area 11 a adjacent to the shownunit pixel area 11 a. According to this structure, not only contact hole18 but also disclination occurring region is masked (shielded).Accordingly, as compared with the case in which a shielding portion formasking the contact hole and a shielding portion for maskingdisclination line 19 are individually provided, the display area can beensured in high degree and a higher aperture ratio can be obtained.

[0088] Moreover, in the structure of this embodiment, the first wideportion 16 a of black matrix 16 is provided between the end portion 14 bof source line 14 and the adjacent data line 13. Therefor, thedisclination line 19 between the source line 14 and data line 13 is evenshielded by the first wide portion 16 a of black matrix 16. Further, theother end (upper right portion of unit pixel area 11 a) of disclinationline 19 overlaps the gate line 12 accordingly, substantially theentirety of disclination forming region (disclination line 19) isshielded by the source line 14, gate line 12 and black matrix 16.Consequently, as compared with the case in which the structure forshielding the disclination line 19 is provided separately from thesource line, gate line, source line, it is possible to obtain a higheraperture ratio.

[0089] An explanation will be next given of the method for manufacturingthe above-structured liquid crystal display device 11 with reference toFIGS. 3A to 3I. It should be noted that the manufacturing method shownbelow is only one example, and any manufacturing method may be possibleif the similar resultant can be obtained. Further, using materials arenot limited to those shown below.

[0090] First, a metal film, made of chromium, etc., is formed on thesurface of first transparent substrate 101, and the metal film ispatterned to form the gate line 12 as illustrated in FIG. 3A. Next, asillustrated in FIG. 3B, an insulating film (gate insulating film 102)such as silicon oxide film, etc., is formed thereon.

[0091] Then, as illustrated FIG. 3B, the semiconductor island 103 with adoped region, made of amorphous silicon, etc., is formed on the gateinsulating film 102. The semiconductor island 103 is formed bydepositing the semiconductor layer, doping the semiconductor layer withimpurity material and patterning the semiconductor layer.

[0092] Sequentially, as illustrated in FIG. 3C, a metal layer 110, madeof chromium, etc., is formed on the gate insulating film 102. Next, asillustrated in FIG. 3D, the metal layer 110 is patterned by lithographytechnique, etc., so as to form the above-shaped data line 13 and sourceline 14. At this time, the groove 103 a, which divides the semiconductorisland 103 into the source region and drain region, is formed on thesemiconductor island 103.

[0093] Next, as illustrated in FIG. 3E, the passivation layer 104,madeof silicon oxide film, etc., and resin layer 105 are formed on the gateinsulating film 102 sequentially to cover the data line 13 and the like.

[0094] After this, the resin layer 105 is patterned to have a gentletaper sidewall by isotropic etching and divided for each pixel. Next,the resin layer 105 is colored with any one of RGB so as to form thecolor layer 105.

[0095] It should be noted that the color layer 105 might be formed byprinting, etc., after forming the opening 104 a on the passivation film104. Next, as illustrated in FIG. 3F, an opening 105 a is formed in thecolor layer 105. Here, the formation of each opening 103 a, 104 a ismade by the individual lithography process, and the opening 105 a ofcolor layer 105 is formed to have a gentle taper sidewall.

[0096] Next, a shield film is formed on the color layer 105 andpatterned so as to form the black matrix 16 in the above-describedshape. Sequentially, as illustrated in FIG. 3G, a resin solution film isformed on the passivation layer 104 by spin coating, etc., and theresultant film is hardened so as to form the overcoat layer 106. Theovercoat layer 106 is made of transparent resin material with highflattening effect, which flattens irregularities due to the color layer105 and black matrix 16. Then, the opening 105 a is formed on theovercoat layer 106 by isotropic etching, etc. The opening 105 a isformed in such a way to cover the sidewall of the opening 105 a of colorlayer 105 and have a gentle taper surface. In this way, the contact hole18 having openings 103 a, 104 a, 105 a is formed.

[0097] Next, as illustrated in FIG. 3H, a transparent conductive filmsuch as ITO etc. is formed on the overcoat layer 106 to come in contactwith the source line 14 through the contact hole 18 by sputtering. Thetransparent conductive film is patterned so that the pixel electrode 17is formed in each pixel region. The pixel electrode 17 comes in contactwith the source line 14 through the contact hole 18.

[0098] Sequentially, the alignment film 107, made of resin, etc., isformed on the pixel electrode 17, and its surface is rubbed to providealignment process thereto. Moreover, seal member 109 is provided to theend periphery of liquid crystal display device 11. Still moreover, thepolarization plate 108 is adhered onto the other surface of firsttransparent substrate 101. In this way, the TFT substrate 100 asillustrated in FIG. 3I is manufactured. Next, the TFT substrate 100 thusmanufactured is adhered to the opposite substrate 200 separatelyprepared to sandwich the spacer (not shown) in such a way that eachalignment film 107 is opposed thereto. Then, the liquid crystal 300 ischarged between two substrates. In this way, the liquid crystal displaydevice 11 as illustrated in FIG. 2 is manufactured.

[0099] In the above-mentioned liquid crystal display devicemanufacturing method, the contact hole 18 is formed by forming theopening separately from the passivation layer 104, color layer 105 andovercoat layer 106. For this reason, alignment must be provided witheach of three photo masks. If the photo masks are designed withconsideration given to an error in alignment, there is a tendency forthe diameter of contact hole 18 to increase. However, the disclinationoccurring region and the forming region of contact hole 18 overlaps witheach other as in this embodiment, and this makes it possible to preventdecrease in the display area and to implement the high aperture ratio ascompared with the case in which the contact hole is formed separatelyfrom the disclination forming region.

[0100] Moreover, in the case where the photosensitive resin is used ascolor layer 105, a light diffraction occurs when the photosensitiveresin film is exposed or the photosensitive resin film isotropicallydissolves in a development solution. For this reason, for example, thereis a tendency for the diameter of contact hole 18 to increase ascompared with the case in which an inorganic film is etched. However,the contact hole 18 is formed to overlap the disclination occurringregion as in this embodiment, making it possible to implement arelatively high aperture ratio even if the diameter of contact hole 18is relatively large.

EXAMPLE

[0101] We studied the reduction in aperture ratio with high definitionby examining the relationship between the pixel pitch and area ratio ofcontact hole 18. The result is shown in FIG. 4.

[0102]FIG. 4 shows the result of studying the liquid crystal displaydevice in which the contact hole 18 does not overlap the disclinationline 19 as illustrated in FIG. 5. The structure illustrated in FIG. 5has substantially the same structure as illustrated in FIG. 1 exceptingthe position of contact hole 18.

[0103] Moreover, in FIG. 5, it is assumed that the contact hole 18 has asquare cross section and an outer diameter of 14 μm×14 μm regardless ofthe size of pixel. This outer diameter value is a value obtained whenthe outer diameter of opening of passivation layer 104 is 8 μm×8 μandeach side of the overlapping margin of overcoat layer 106 and colorlayer 105 is 1.5 μm. At this time, it is assumed that one contact hole18 with a cross-sectional area of 196 μm² exists in the unit pixel area11 a.

[0104] If the percentage of contact hole 18 area occupying the pixelarea is set to the area ratio of contact hole 18, the area ratio ofcontact hole 18 is calculated as follows:

[0105] More specifically, the respective pixels with a size of 100μm×300 μm, which display red, blue and green colors, are combined witheach other so as to produce color display. For example, in the casewhere the pixel pitch is 300 μm, 0.65%, which is a ratio between pixelsize of 100 μm×300 μm and the contact hole area of 196 μm², iscalculated as an area ratio of contact hole 18 of each pixel. In thisway, the pixel pitch, definition, and area ratio of contact hole 18 canbe calculated as illustrated in FIG. 4.

[0106] In the case where definition is lower than 100 dpi (dot per inch)as illustrated in FIG. 4, the area ratio of contact hole 18 is low asunder 1%. This is because when definition is low, the contact hole 18 isoverlapped the gate line 12 or data line 13, making it possible for thesize of contact hole 18 to have no bearing on the actual aperture ratio.

[0107] However, in the case where definition exceeds 150 dpi, the wiringbecome thin, and this makes it impossible to mask the contact hole 18completely. For this reason, in the case where the pixel pitch is about126 μm and definition is 200 dpi, contribution of contact hole 18 areareaches 3.70% of the pixel area, and this is so large that it may not beignored in view of the calculation of aperture ratio.

[0108] Accordingly, regarding definition of over 200 dpi, the need forproviding the shield region for masking disclination comes about.Namely, in the case where the pixel pitch is large, disclination can bemasked by the wiring. However, the width of wiring becomes thinnertogether with miniaturization, resulting that disclination appears inthe display region. Though this requires the structure for masking theregion where disclination occurs, the aperture ratio decreases if such astructure is provided. Therefor, there is needed a method for shieldingthe region where disclination occurs without decreasing the apertureratio.

[0109] Here, the effect obtained when the region where disclinationoccurred was masked with the source line 14, gate line portion 12 andblack matrix 16 using the structure shown in FIG. 5 was estimated. Itshould noted that the pixel pitch is 126 μm, the outer diameter of thecross section of contact hole 18 is 8 μm×8 μm, and alignment margin ofeach layer is 1.5 μm.

[0110] This estimation showed that according to the structure of FIG. 1where disclination line 19 overlapped the contact hole 18, the apertureratio improved by 5.5% as compared with the structure of FIG. 5. At thistime, since the aperture ratio is about 4.0%, the aperture ratio can berelatively improved by about 13.8%. This result shows that the structurewhere the disclination occurring region overlaps the forming region ofcontact hole 18 can implement the high aperture ratio even in highdefinition of about 200 dpi.

[0111] As explained above, according to this embodiment, there isprovided the structure in which the forming region of contact hole 18and the disclination occurring region overlap with each other. Accordingto the structure using common elements for masking each region it ispossible to obtain a higher aperture ratio as compared with the case inwhich the common masking elements is used.

[0112] Moreover, the above configuration is more effectively applicableto the case in which definition is high, for example, 200 dpi or less.Namely, in the case where definition is high and the area of contacthole in the pixel cannot be ignored, the use of the above structure canobtain the high aperture ratio. Particularly, in the CF-On TFT 15structure, which is required to form the openings on the plurality oflayers individually, the diameter of contact hole 18 for ensuring thealignment margin tends to be increased. Accordingly, the above structurecan be effectively used for suppressing the reduction in the apertureratio even if definition progresses.

[0113] The above explained the preferred embodiment of the presentinvention. However, the present invention is not limited to the aboveembodiment, and variations and addition may be possible withoutdeparting from the broad sprit and scope of the invention.

[0114] In the above embodiment, the contact hole 18 passing through thewide end portion 14 b of source line 14 was formed. However, the shapeof source line 14 and the position of contact hole 18 are not limited tothe above example, and any configuration may be possible if capacitancecan be formed between the gate line 12 and source line 14, and theregions for the contact hole 18 and disclination can effectively bemasked. For example, as illustrated in FIG. 6, the source line 14 may beformed to overlap not only the second projecting portion 12 b of gateline 12 but also the main line thereof. In this configuration, theregions for the contact hole 18 and/or disclination are shielded by themain line of gate line 12.

[0115] Moreover, in the aforementioned embodiment, the passivation layer104 was formed on the data line 13. However, even in the configurationwithout passivation layer 104, the same effect can be obtained.

[0116] Still moreover, in the aforementioned embodiment, rubbing wasperformed in the rubbing direction as illustrated in FIG. 1 and thedisclination line 19 occurred as illustrated in the figure. However,even if the rubbing direction is the other direction and thedisclination line 19 is formed at the position different from that ofFIG. 1, the present invention can be applied. In this case, for example,if disclination occurs at the other comer of pixel region, the contacthole 18 is formed to overlap the location of occurrence, so that theeffect of the present invention can be, of course, obtained.

[0117] Still moreover, in the aforementioned embodiment, one contacthole 18 for connecting TFT 15 to the pixel electrode 17 is formed. Forthis, the reduction in the aperture ratio is minimized by the presenceof contact hole 18. However, the present invention can be, of course,applied to the case in which a plurality of contact holes is formed.

[0118] Still moreover, the active element (switching element) may be notonly TFT 15 but also MIM, diode, etc. In addition, TFT 15 may such aforward staggered type that the gate electrode is positioned at theopposite side of first transparent substrate 101 against thesemiconductor layer, instead of a reverse staggered type.

[0119] Furthermore, the aforementioned embodiment was explained using anexample of the so-called CF (Color Filter) -On TFT structure in whichthe color layer 105 was formed on the TFT substrate 100. However, thepresent invention can be applied to the structure in which the colorlayer 105 is formed on the opposite substrate 200. In other words, thepresent invention can be applied to any liquid crystal display device ifthe forming region of contact hole 18 and disclination forming regionare arranged to overlap with each other.

[0120] Still furthermore, the aforementioned embodiment explained thecase in which the active matrix liquid crystal display device wasapplied to the active matrix liquid crystal display device of a verticalelectric field type. However, the present invention can be applied tothe other liquid crystal display devices such as a simple matrix typeliquid crystal display device, ferroelectric liquid crystal displaydevice, polymer dispersion type liquid crystal display device or IPS (InPlane Switching) type liquid crystal display device.

[0121] Various embodiments and changes may be made thereunto withoutdeparting from the broad spirit and scope of the invention. Theabove-described embodiment is intended to illustrate the presentinvention, not to limit the scope of the present invention. The scope ofthe present invention is shown by the attached claims rather than theembodiment. Various modifications made within the meaning of anequivalent of the claims of the invention and within the claims are tobe regarded to be in the scope of the present invention.

[0122] This application is based on Japanese Patent Application No.2001-049492 filed on Feb. 23, 2001 and including specification, claims,drawings and summary. The disclosure of the above Japanese PatentApplication is incorporated herein by reference in its entirety.

What is claimed is:
 1. A liquid crystal display device comprising: apair of substrates; a liquid crystal sealed between said pair ofsubstrates; a plurality of data lines and a plurality of scanning lines,being arranged on one surface of one of said pair of substrates andcrossing each other; a switching element having one end of a currentpath connected to the corresponding data line and a control endconnected to the corresponding scanning line; a wiring connected to theother end of the current path of said switching element; an insulatinglayer, being formed on said wiring and having a contact hole throughwhich an end portion of said wiring is exposed; a pixel electrode, beingformed on said insulating layer and electrically connected to the endportion of said wiring through the contact hole; and an alignment film,being formed on said pixel electrode and in contact with said liquidcrystal, wherein said contact hole is formed at a position overlapping aregion where disclination occurs.
 2. The liquid crystal display deviceaccording to claim 1, wherein said insulating layer is formed of aplurality of laminated insulating films, the insulating films haveopenings individually which form said contact hole in a tapered shape asa whole.
 3. The liquid crystal display device according to claim 1,wherein said insulting films includes a passivation film formed on theswitching element, a color layer formed on said passivation film, and aflattening film formed on said passivation film and color layer, saidcontact hole includes openings formed in the passivation film, the colorlayer, and the flattening film, respectively, and the openings beingformed in a tapered shape as a whole.
 4. The liquid crystal displaydevice according to claim 1, wherein said wiring is made of a lightshielding material, and said contact hole and at least a part of saidregion where disclination occurs are shielded by said wiring.
 5. Theliquid crystal display device according to claim 1, wherein the scanninglines and the data lines bounds a plurality of pixels each having saidcontact hole, said contact hole in the pixel is provided at a downstreamin a rubbing direction with respect to the switching element of otherpixel adjacent to the pixel.
 6. The liquid crystal display deviceaccording to claim 1, wherein said scanning line has a projectingportion overlapping said contact hole and/or said region wheredisclination occurs and shielding light.
 7. The liquid crystal displaydevice according to claim 4, further comprising a black matrixoverlapping said data lines, wherein said black matrix has a wideportion overlapping a region in the pixel between said data line and theprojecting portion.
 8. The liquid crystal display device according toclaim 4, wherein said projecting portion forms electrostatic capacitancebetween the wiring.
 9. A liquid crystal display device manufacturingmethod, the liquid crystal display device comprising a thin filmtransistor, a wiring connected to said thin film transistor, a pixelelectrode electrically connected to said wiring, and an alignment filmformed on said pixel electrode, comprising steps of: forming aninsulating layer overlying the thin film transistor and the wiring;forming a contact hole in the insulating layer through which an endportion of said wiring is exposed; forming the pixel electrode on theinsulating layer connected electrically with the wiring through thecontact hole; and forming the alignment film on the pixel electrode,wherein the step of forming the contact hole comprising a step offorming the contact hole in a position overlapping a region wheredisclination occurs.
 10. A liquid crystal display device manufacturingmethod according to claim 9, the insulating layer including a pluralityof laminated insulating films, the step of forming the contact holecomprising a step of forming openings in the plurality of the insulatingfilms respectively.
 11. A liquid crystal display device manufacturingmethod according to claim 9, the insulating layer including apassivation film formed on the switching element, a color layer formedon said passivation film, and a flattening film formed on saidpassivation film and color layer, the step of forming the contact holecomprising a step of forming openings in the passivation film, the colorlayer, and the flattening film, respectively, thereby forming thecontact hole in a tapered shape as a whole.